From Regulus Berdin
;********************************************************************** ; Adjustable delay from 11-256 cycles (for 14 bit core) ; W = count, cycle count excludes loading of W ; by Regulus Berdin delay: addlw -(.10+1) ;2+1 remove 1 count more for carry correction addlw -4 ; 1 skpnc ; 1/2 goto $-2 ; 2 sublw 0xFF ; 1 addwf PCL,f ; 2 delay7 nop ; delay adjuster delay6 nop ; delay5 nop ; delay4 return ;2
Questions:
Comments:
addlw -(9+1) addlw -4 skpnc goto $-2 subwf PCL,f nop ;(this line never run) nop nop nop return+
file: /Techref/microchip/delay/8b1cr15m-rb.htm, 1KB, , updated: 2013/3/4 15:59, local time: 2024/8/14 23:30,
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