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'[PIC]: Interfacing To Voice Codec MC145484'
2004\05\08@111657 by Bob Axtell

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Anybody have experience with the Motorola MC145484
Voice Codec? Winbond has the same thing under the P/N
W8610IR. I'm trying to extract the data generated by a
PIC which then sends it via RS232 and of course input
data TO it from RS232 back into a voice pattern.

The problem is that I am having trouble understanding the relationship
between the bit clock, the master clock, and the sync signal
(that starts the transfer). I've read several explanations
and none of them seem clear enough to me to work out a
design.

What I am trying to do is to use the SPI port with SS\ in
long sync frame mode. Seems like an obvious way to do it,
but the examples never use that obvious approach.

--Bob

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2004\05\08@135652 by piclist

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On Sat, 8 May 2004, Bob Axtell wrote:

> Anybody have experience with the Motorola MC145484
> Voice Codec? Winbond has the same thing under the P/N
> W8610IR.

> The problem is that I am having trouble understanding the relationship
> between the bit clock, the master clock, and the sync signal
> (that starts the transfer). I've read several explanations
> and none of them seem clear enough to me to work out a
> design.

I've worked with the Winbond part.  I agree that the datasheets aren't
at all clear, though it turns out the part is extremely trivial.
Bring frame sync high while the bit clock is low, set up or sample
data on the next eight high clocks, then bring frame sync low.  The
master clock isn't relevant to the software aspect.

I used an 18F part with the audio in a high-priority interrupt, since
you have to maintain a very precise 8 kHz on the frame sync pulse.

> What I am trying to do is to use the SPI port with SS\ in
> long sync frame mode. Seems like an obvious way to do it,
> but the examples never use that obvious approach.

I'm not sure I see how SPI would be helpful.  What would the SPI clock
be?

--
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2004\05\09@030621 by Bob Axtell

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piclist@XARGS.COM wrote:
{Quote hidden}

So you just need 8 bit clocks to receive a byte using the Frame Sync
and the data to send the byte. Do you need to provide more than 8
clocks? Can the transfer speed be almost any speed, as long as Frame
Sync is reliable?


How about the 8K period? If the master clock is slowed down in
proportion, can the chip work with 7.5K sample rate without significant
difference? I realize that there are filters, etc but if everything is
slowed down slightly all inproportion, looks like it should work almost
as well.

Thanks for the info, very much appreciated.

{Quote hidden}

Well, I would initiate SPI with the clock low, and READIN or SENDOUT the
data from DR or to DR, with the SPI clock providing the bit clock. The
ss\ will be inverted to become the Frame Suync Pulse. Wouldn't that work?


> --
> John W. Temples, III
>
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>


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2004\05\09@131847 by piclist

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On Sun, 9 May 2004, Bob Axtell wrote:

> So you just need 8 bit clocks to receive a byte using the Frame Sync
> and the data to send the byte. Do you need to provide more than 8
> clocks?

The clocks run continuously; I assume they drive the conversions when
you're not clocking data in/out.

> Can the transfer speed be almost any speed, as long as Frame
> Sync is reliable?

The datasheet indicates the allowed clock speeds, and the transfer is
at one of those speeds.

> How about the 8K period? If the master clock is slowed down in
> proportion, can the chip work with 7.5K sample rate without significant
> difference?

I've only used it within spec.

> Well, I would initiate SPI with the clock low, and READIN or SENDOUT the
> data from DR or to DR, with the SPI clock providing the bit clock. The
> ss\ will be inverted to become the Frame Suync Pulse. Wouldn't that work?

That's not going to provide a continuous clock.  I used a 256kHz PWM
off of the PIC to provide the clocks.

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