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PICList Thread
'Driving Relay'
2000\01\18@111719 by Jane Ifurung

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I'm using a +5V DPDT relay and I had a problem with
regards to energizing its coil. I tied one end of its
coil to +5V and the other end to an AND gate output
(MM74C08N). The relay should be energized when the
output of the AND gate is logic 0 and deenergized when
logic 1. However, when the AND gate is supposed to
output logic 0, it always stays to logic 1 (this is
when it is connected to the relay). Does this mean
that the AND gate is being loaded by the relay? ....
sort of loading effect?

I also tried using AND gate buffer (CD4081BCN) but to
no avail. It can't drive the relay.

.... Now, I was able to solve the problem stated
above. At the AND output I inserted a buffer(74F244)
and tied the buffer output to the other end of the
relay coil. It worked!

My question is, is there an alternative solution?
Buffer consumes space.

Jane



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2000\01\18@113336 by Terry A. Steen

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Just connect the PIC output to the base of an NPN (2N3904), the collector
to Vcc, and the emitter to the coil of the relay. You might put a resistor
(100-1k ohm) between the PIC and the transistor. Maybe even pull-down the
base. There is no reason o use a logic gate when all you want is its output
transistor.

Terry

At 08:16 AM 1/18/2000 -0800, Jane Ifurung wrote:
{Quote hidden}

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2000\01\18@155722 by Jinx

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www.scooby.flysaturn.com/cktlib/relaydrv/index.html


> I'm using a +5V DPDT relay and I had a problem with
> regards to energizing its coil

> Jane Ifurung
> UP Diliman, Quezon City

2000\01\18@161601 by Dave VanHorn

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> > I'm using a +5V DPDT relay and I had a problem with
> > regards to energizing its coil
>
> > Jane Ifurung
> > UP Diliman, Quezon City

Two things:

Make sure your driver turns on, and make sure it turns off.


This is trickier than it may appear at first.
Look in your chip specs, and find the guaranteed max logic low output
voltage.
(assuming on when high, off when low)
Your driver must stay shut off, even at this output voltage (also look at
leakage current specs)
Same on the high side, with guaranteed minimum high voltage.

If you don't take this into account, then you end up with a circuit that
usually works.



Without a description of your circuit, here's some general info:

You need to protect the driver from the field collapse of the relay coil.
A diode in paralell with the coil, such that the diode does not conduct
while the relay is on, is usually suficient.

Finally, make sure that your driver, in the on state, is really driving the
relay hard enough to pull in.  Assuming an open collector transistor driver
(emitter to ground) you should see <1V on the collector in the on state.
Preferrably closer to 0.6V. Higher than that indicates that the transistor
isn't turning on enough. You may need a higher gain transistor, or more base
current in the on state.

Last, of course you need enough voltage across the relay coil to pull in the
armature.
Check this with your driver on, across the coil. A "5V" relay will pull in
with less, but unless you have the spec, you're taking a chance.

2000\01\18@184145 by paulb

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Jane Ifurung wrote:

> I'm using a +5V DPDT relay and I had a problem with regards to
> energizing its coil.  I tied one end of its coil to +5V and the other
> end to an AND gate output (MM74C08N).  The relay should be energized
> when the output of the AND gate is logic 0 and deenergized when logic
> 1.  However, when the AND gate is supposed to output logic 0, it
> always stays to logic 1 (this is when it is connected to the relay).

> Does this mean that the AND gate is being loaded by the relay? ....
> sort of loading effect?

 That's a considerable understatement.  74Cxx/4000 series CMOS logic
has
virtually *no* output drive capability - a few milliamps at most.  74Fxx
series OTOH can drive some tens of milliamps.  74HCxx are not too bad
either, but you are possibly stretching the specs.

 Use a "logic" MOSFET (turns on at about 3V on the gate) for this job.
If you want cheap, use a PNP transistor with emitter to 5V, collector to
relay to ground and base to logic gate via a resistor of about 10k.

 A corresponding logic FET would be a P-channel one, which are not as
readily available and therefore probably not as cheap.  With the FET
however, you do not need a resistor; the FET gate connects directly to
the CMOS output.

 For either FET or transistor, you need the diode across the relay in
the direction it doesn't conduct when the coil is energised by the
transistor.

 For any further suggestions, please specify the relay coil resistance.
--
 Cheers,
       Paul B.

2000\01\19@115737 by Wagner Lipnharski

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Of course, reading twice a text makes it clear. Now I understand that
Jane's circuit activates the relay when the output of the *AND* chip is
low, which meas any input low should activates the relay, or, working as
an inverted OR fashion.  This is why my previous suggestion of RTL
doesn't work, since it expects two inputs with HIGH level. In this new
situation the RTL should be inverted, using a PNP transistor instead.

The software change (up level to activate the relay) is not recommended
in microcontrollers that turn up level all output port pins during the
reset state, to avoid the relay to click during power on.

                .-------------o------> +5V
                |             |
       860 Ohms R             |
                R             |
                |             |
-     4700 Ohms |          Emmiter    MPSA92 PNP 300V 500mA
(a)----RRRRR-----o------PNP Base       $0.33 at Digikey
                |          Collector
-     4700 Ohms |             |
(b)----RRRRR-----'             |
                            RELAY (w/diode)
                              |
                              |
                             Gnd

The actual resistor values should work nicely even with (a) and (b)
inputs high level at +3Vdc.

Little adjustments at the 860 Ohms resistor could be required to reach
the correct operation.

The above circuit should actuate the relay with any or both inputs at
low level, or (for a better understanding) both inputs should be up
(from 3 to 5V) to keep the relay not actuated.

To reduce the uC port pin current: Use a P-Channel (MOSFET BS110 or DMOS
BS250P, 45V, 230mA, VGS=1-3V, 14 Ohms, $0.69 at Digikey) as this DTL
circuit:

                .-------------o------> +5V
                |             |
       22 kOhms R             |
                R             |
                |             |
                o--------,|---|
                |        ||-->'  P Channel
                R        ||---.
           (*)  R             |
                |             |
-               |           RELAY (w/diode)
(a)----|<l-------o             |
-               |             |
(b)----|<l-------'             |
   Silicon                    |
  Signal Diodes              Gnd

(*) Resistor needed if (a) or (b) input HIGH logic level is below
+3.5Vdc (value from 1 kOhms to 4.7 kOhms).
In any case, the LOW (a) or (b) input level should be less than +1Vdc.


Wagner

Jane Ifurung wrote:
{Quote hidden}

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