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RS and Flip-Flops

The RS flip-flop (RSFF) is the result of cross-connecting two NOR gates as shown in figure 7.18. The RS inputs are referred to as active ones.

Figure 7.18:  The RS flip-flop constructed from NOR gates, and its circuit symbol and truth table.

The ideal flip-flop has only two rest states, set and reset, defined by and , respectively.

A very similar flip-flop can be constructed using two NAND gates as shown in figure 7.19. The inputs are now active zeros.

Figure 7.19:  The flip-flop constructed from NAND gates, and its circuit symbol and truth table.

These FFs are often referred to as the set/reset type and are un-clocked.

Doug Gingrich
Tue Jul 13 16:55:15 EDT 1999